Job Category: Engineering - Electrical
Digital ASIC design and verification engineers (level 4) supporting The Satellite Capabilities organization and multiple satellite product lines based in Los Angeles.
Utilize high-level architectural documentation along with algorithm description and implement DSP functions for functions such as decimation, interpolation, general filtering, up-down conversion, digital beamforming, channelization, and be able to develop mathematical models in SystemVerilog to verify design implementation and develop and run scripts and Makefiles.
Experience in Digital ASIC design and verification.
Experience with ASIC development including architectural definition, detailed design implementation using SystemVerilog, and functional verification using SystemVerilog.
Experience with design architecture and detailed specification generation.
Knowledge and competency of UVM.
Thrive in working within a fast-paced environment and work well in a team of ASIC engineers and Subsystem engineers.
Demonstrated history of 1st pass success with ASIC designs.
Typical Education and Experience
Degree and typical experience in engineering classification:
Bachelor's and 9 or more years' experience
Master's with 7 or more years' experience
Ph.D. with 4 or more years' experience. Bachelor, Master or Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry. ABET is the preferred, although not required, accreditation standard.
Security Clearance Required: No
Visa Candidate Considered: No