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Senior Digital Design Engineer

Scottsdale, AZ · Architecture/Engineering
Our company engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 13,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high performance team!

Position Overview:
Senior Digital Design Engineers research, design, develop and test electronic equipment and systems at GDMS including: radar detection/communications equipment and systems, circuitry components, computers, and Digital Signal Processing equipment. 

  • Exercise creative thinking and ideation to advance our business performance.
  • Deliver innovative, flexible, integrated solutions to meet customers changing business needs.
  • Support and engage in programs, projects and practices behind the GDMS culture and strategy, and comply with all policies and procedures.
  • Follow industry and department trends and developments to ensure GDMS services are consistent with, and/or superior to, industry best practices.
  • Provide technical leadership and/or direction to lower level designers

Education/ Experience:
  • Bachelor's degree in Electrical Engineering, a related specialized area or field is required (or equivalent experience) plus a minimum of 10 years of relevant experience; or Master's degree plus a minimum of 8 years of relevant experience
  • Experience with Allegro and/or Mentor design tools
  • Extensive experience designing multi-layer Printer Circuit Boards with controlled impedance layers and blind micro-vias
  • Able to analyze and test for signal integrity, crosstalk, etc.
  • Familiar with several families of uProcessors, uControllers, FPGAs and System-on-Chips
  • Demonstrates initiative on assignments, exercises strong independent judgment
  • Able to technically lead/mentor less senior engineers
  • Preferred Experience:
  • High Reliability or Space experience
  • Experience with Worst Case Analysis, Stress Analysis

Department of Defense TS/SCI security clearance is preferred at time of hire. Candidates must be able to obtain a TS/SCI clearance within a reasonable amount of time from date of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.
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