Location - Richardson TX only (Given COVID situation, we are open to someone starting remote for some days until the situation improves and stay home guidelines are lifted)
Less than 10% travel
Visa sponsorship not provided so please present US Citizens, Green card holders and other candidates who do not require any sponsorship now or in future.
Due to growth and customer demand, we are recruiting for a Senior Digital Design Engineer to join our team in Richardson, Texas.
DUTIES & RESPONSIBILITES:
- Develop high speed digital signal processing circuit card for 5G access point transceiver system consisting of 10/25/40 Gbps optical interface, fronthaul interface and signal processing in FPGA, DC power conversion circuitry, system clocking and synchronization circuits, and high-speed data converters.
- Conduct FPGA & CPLD device evaluation to determine best application fit for cost, size, and power consumption.
- Conduct digital and mixed signal circuit design and schematic capture for all circuitry including QSFP, FPGA, CPLD, ASIC, high speed data converters, power conversion circuits, and clocking circuits.
- Conduct system architecture analysis, timing analysis, signal integrity simulation, resource estimation, power estimation, DUC/DDC frequency planning, spurious analysis, and mixed signal dynamic range analysis.
- Lead PCB design ensuring high density FPGA break-out, high speed serial and bus matched length routing and signal integrity, line impedance control, mixed signal noise immunity, and low noise power distribution.
- Conduct full PCB assembly verification including initial board bring-up, functional verification, design verification testing, and system integration and testing.
- Work closely with software and FPGA engineers for board design, initial board bring-up, and feature integration.
- Bachelor's degree in Electrical Engineering required with a minimum of nine (9) years of relevant experience OR Master’s degree in Electrical Engineering with seven (7) years of relevant experience.
- Experience in high speed digital design including FPGAs, CPLDs, optical SFPs, DDR4 memory, high speed data converters, power conversion circuits, system clocking and synchronization including PTP.
- Experience using Mentor Graphics or other schematic capture tools.
- Experience in directing PCB layout of high-speed signal routing, matched length routing, and signal integrity simulation for 28 Gbps serial links and DDR3/4 memory interfaces.
- Experience using high speed serial communication interfaces including LVDS, USB, SPI, CPRI, and I2C.
- Experience in design and routing of high speed JESD buses and high-speed DDR interfaces.
- Experience in generation and distribution of low jitter system clock trees.
- Background in system architecture analysis, timing analysis, signal integrity simulation, resource estimation, power estimation, DUC/DDC frequency planning, spurious analysis, and mixed signal dynamic range analysis.
- Experience in development of high speed signal processing hardware for wireless infrastructure equipment.
- Familiar with use of lab test equipment including logic analyzers, spectrum analyzers, signal generators, arbitrary waveform generators, and vector signal analyzers.
- Ability to write automation scripts in different languages (bash, Matlab, etc) for repetitive lab tasks is a plus.
- Experience implementing IEEE-1588 and SynchE client synchronization is a plus.
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